
State Machine - |test_uart|tx_st
Name tx_st.11 tx_st.10 tx_st.01 tx_st.00 
tx_st.00 0 0 0 0 
tx_st.01 0 0 1 1 
tx_st.10 0 1 0 1 
tx_st.11 1 0 0 1 

State Machine - |test_uart|uart:uart_inst|tx:txd_inst|tx_st
Name tx_st.STOP2_BIT tx_st.STOP1_BIT tx_st.PAR_BIT tx_st.EIGTH_BIT tx_st.SEVN_BIT tx_st.SIX_BIT tx_st.FIF_BIT tx_st.FOUTH_BIT tx_st.THIRD_BIT tx_st.SEC_BIT tx_st.FIRST_BIT tx_st.START tx_st.0000 
tx_st.0000 0 0 0 0 0 0 0 0 0 0 0 0 0 
tx_st.START 0 0 0 0 0 0 0 0 0 0 0 1 1 
tx_st.FIRST_BIT 0 0 0 0 0 0 0 0 0 0 1 0 1 
tx_st.SEC_BIT 0 0 0 0 0 0 0 0 0 1 0 0 1 
tx_st.THIRD_BIT 0 0 0 0 0 0 0 0 1 0 0 0 1 
tx_st.FOUTH_BIT 0 0 0 0 0 0 0 1 0 0 0 0 1 
tx_st.FIF_BIT 0 0 0 0 0 0 1 0 0 0 0 0 1 
tx_st.SIX_BIT 0 0 0 0 0 1 0 0 0 0 0 0 1 
tx_st.SEVN_BIT 0 0 0 0 1 0 0 0 0 0 0 0 1 
tx_st.EIGTH_BIT 0 0 0 1 0 0 0 0 0 0 0 0 1 
tx_st.PAR_BIT 0 0 1 0 0 0 0 0 0 0 0 0 1 
tx_st.STOP1_BIT 0 1 0 0 0 0 0 0 0 0 0 0 1 
tx_st.STOP2_BIT 1 0 0 0 0 0 0 0 0 0 0 0 1 
