Verilog 10b/8b decoder

Verilog 10b/8b解码代码

module decode_10b8b
(
input  [9:0]   datain, 
input          dispin, 
output         ko,
output [7:0]   dataout,
output         dispout,
output         code_err, 
output         disp_err
) ;
wire ai = datain[9] ;
wire bi = datain[8] ;
wire ci = datain[7] ;
wire di = datain[6] ;
wire ei = datain[5] ;
wire ii = datain[4] ;
wire fi = datain[3] ;
wire gi = datain[2] ;
wire hi = datain[1] ;
wire ji = datain[0] ;
wire aeqb = (ai &amp; bi) | (!ai &amp; !bi) ;
wire ceqd = (ci &amp; di) | (!ci &amp; !di) ;
wire p22 = (ai &amp; bi &amp; !ci &amp; !di) |
(ci &amp; di &amp; !ai &amp; !bi) |
( !aeqb &amp; !ceqd) ;
wire p13 = ( !aeqb &amp; !ci &amp; !di) |
( !ceqd &amp; !ai &amp; !bi) ;
wire p31 = ( !aeqb &amp; ci &amp; di) |
( !ceqd &amp; ai &amp; bi) ;
wire p40 = ai &amp; bi &amp; ci &amp; di ;
wire p04 = !ai &amp; !bi &amp; !ci &amp; !di ;
wire disp6a = p31 | (p22 &amp; dispin) ; // pos disp if p22 and was pos, or p31.
wire disp6a2 = p31 &amp; dispin ; // disp is ++ after 4 bits
wire disp6a0 = p13 &amp; ! dispin ; // -- disp after 4 bits
wire disp6b = (((ei &amp; ii &amp; ! disp6a0) | (disp6a &amp; (ei | ii)) | disp6a2 |
(ei &amp; ii &amp; di)) &amp; (ei | ii | di)) ;
// The 5B/6B decoding special cases where ABCDE != abcde
wire p22bceeqi = p22 &amp; bi &amp; ci &amp; (ei == ii) ;
wire p22bncneeqi = p22 &amp; !bi &amp; !ci &amp; (ei == ii) ;
wire p13in = p13 &amp; !ii ;
wire p31i = p31 &amp; ii ;
wire p13dei = p13 &amp; di &amp; ei &amp; ii ;
wire p22aceeqi = p22 &amp; ai &amp; ci &amp; (ei == ii) ;
wire p22ancneeqi = p22 &amp; !ai &amp; !ci &amp; (ei == ii) ;
wire p13en = p13 &amp; !ei ;
wire anbnenin = !ai &amp; !bi &amp; !ei &amp; !ii ;
wire abei = ai &amp; bi &amp; ei &amp; ii ;
wire cdei = ci &amp; di &amp; ei &amp; ii ;
wire cndnenin = !ci &amp; !di &amp; !ei &amp; !ii ;
// non-zero disparity cases:
wire p22enin = p22 &amp; !ei &amp; !ii ;
wire p22ei = p22 &amp; ei &amp; ii ;
//wire p13in = p12 &amp; !ii ;
//wire p31i = p31 &amp; ii ;
wire p31dnenin = p31 &amp; !di &amp; !ei &amp; !ii ;
//wire p13dei = p13 &amp; di &amp; ei &amp; ii ;
wire p31e = p31 &amp; ei ;
wire compa = p22bncneeqi | p31i | p13dei | p22ancneeqi |
p13en | abei | cndnenin ;
wire compb = p22bceeqi | p31i | p13dei | p22aceeqi |
p13en | abei | cndnenin ;
wire compc = p22bceeqi | p31i | p13dei | p22ancneeqi |
p13en | anbnenin | cndnenin ;
wire compd = p22bncneeqi | p31i | p13dei | p22aceeqi |
p13en | abei | cndnenin ;
wire compe = p22bncneeqi | p13in | p13dei | p22ancneeqi |
p13en | anbnenin | cndnenin ;
wire ao = ai ^ compa ;
wire bo = bi ^ compb ;
wire co = ci ^ compc ;
wire do = di ^ compd ;
wire eo = ei ^ compe ;
wire feqg = (fi &amp; gi) | (!fi &amp; !gi) ;
wire heqj = (hi &amp; ji) | (!hi &amp; !ji) ;
wire fghj22 = (fi &amp; gi &amp; !hi &amp; !ji) |
(!fi &amp; !gi &amp; hi &amp; ji) |
( !feqg &amp; !heqj) ;
wire fghjp13 = ( !feqg &amp; !hi &amp; !ji) |
( !heqj &amp; !fi &amp; !gi) ;
wire fghjp31 = ( (!feqg) &amp; hi &amp; ji) |
( !heqj &amp; fi &amp; gi) ;
assign dispout = (fghjp31 | (disp6b &amp; fghj22) | (hi &amp; ji)) &amp; (hi | ji) ;
assign ko = ( (ci &amp; di &amp; ei &amp; ii) | ( !ci &amp; !di &amp; !ei &amp; !ii) |
(p13 &amp; !ei &amp; ii &amp; gi &amp; hi &amp; ji) |
(p31 &amp; ei &amp; !ii &amp; !gi &amp; !hi &amp; !ji)) ;
wire alt7 = (fi &amp; !gi &amp; !hi &amp; // 1000 cases, where disp6b is 1
((dispin &amp; ci &amp; di &amp; !ei &amp; !ii) | ko |
(dispin &amp; !ci &amp; di &amp; !ei &amp; !ii))) |
(!fi &amp; gi &amp; hi &amp; // 0111 cases, where disp6b is 0
(( !dispin &amp; !ci &amp; !di &amp; ei &amp; ii) | ko |
( !dispin &amp; ci &amp; !di &amp; ei &amp; ii))) ;
wire k28 = (ci &amp; di &amp; ei &amp; ii) | ! (ci | di | ei | ii) ;
// k28 with positive disp into fghi - .1, .2, .5, and .6 special cases
wire k28p = ! (ci | di | ei | ii) ;
wire fo = (ji &amp; !fi &amp; (hi | !gi | k28p)) |
(fi &amp; !ji &amp; (!hi | gi | !k28p)) |
(k28p &amp; gi &amp; hi) |
(!k28p &amp; !gi &amp; !hi) ;
wire go = (ji &amp; !fi &amp; (hi | !gi | !k28p)) |
(fi &amp; !ji &amp; (!hi | gi |k28p)) |
(!k28p &amp; gi &amp; hi) |
(k28p &amp; !gi &amp; !hi) ;
wire ho = ((ji ^ hi) &amp; ! ((!fi &amp; gi &amp; !hi &amp; ji &amp; !k28p) | (!fi &amp; gi &amp; hi &amp; !ji &amp; k28p) |
(fi &amp; !gi &amp; !hi &amp; ji &amp; !k28p) | (fi &amp; !gi &amp; hi &amp; !ji &amp; k28p))) |
(!fi &amp; gi &amp; hi &amp; ji) | (fi &amp; !gi &amp; !hi &amp; !ji) ;
wire disp6p = (p31 &amp; (ei | ii)) | (p22 &amp; ei &amp; ii) ;
wire disp6n = (p13 &amp; ! (ei &amp; ii)) | (p22 &amp; !ei &amp; !ii) ;
wire disp4p = fghjp31 ;
wire disp4n = fghjp13 ;
assign code_err = p40 | p04 | (fi &amp; gi &amp; hi &amp; ji) | (!fi &amp; !gi &amp; !hi &amp; !ji) |
(p13 &amp; !ei &amp; !ii) | (p31 &amp; ei &amp; ii) |
(ei &amp; ii &amp; fi &amp; gi &amp; hi) | (!ei &amp; !ii &amp; !fi &amp; !gi &amp; !hi) |
(ei &amp; !ii &amp; gi &amp; hi &amp; ji) | (!ei &amp; ii &amp; !gi &amp; !hi &amp; !ji) |
(!p31 &amp; ei &amp; !ii &amp; !gi &amp; !hi &amp; !ji) |
(!p13 &amp; !ei &amp; ii &amp; gi &amp; hi &amp; ji) |
(((ei &amp; ii &amp; !gi &amp; !hi &amp; !ji) |
(!ei &amp; !ii &amp; gi &amp; hi &amp; ji)) &amp;
! ((ci &amp; di &amp; ei) | (!ci &amp; !di &amp; !ei))) |
(disp6p &amp; disp4p) | (disp6n &amp; disp4n) |
(ai &amp; bi &amp; ci &amp; !ei &amp; !ii &amp; ((!fi &amp; !gi) | fghjp13)) |
(!ai &amp; !bi &amp; !ci &amp; ei &amp; ii &amp; ((fi &amp; gi) | fghjp31)) |
(fi &amp; gi &amp; !hi &amp; !ji &amp; disp6p) |
(!fi &amp; !gi &amp; hi &amp; ji &amp; disp6n) |
(ci &amp; di &amp; ei &amp; ii &amp; !fi &amp; !gi &amp; !hi) |
(!ci &amp; !di &amp; !ei &amp; !ii &amp; fi &amp; gi &amp; hi) ;
assign dataout = {ho, go, fo, eo, do, co, bo, ao} ;
assign disp_err = ((dispin &amp; disp6p) | (disp6n &amp; !dispin) |
(dispin &amp; !disp6n &amp; fi &amp; gi) |
(dispin &amp; ai &amp; bi &amp; ci) |
(dispin &amp; !disp6n &amp; disp4p) |
(!dispin &amp; !disp6p &amp; !fi &amp; !gi) |
(!dispin &amp; !ai &amp; !bi &amp; !ci) |
(!dispin &amp; !disp6p &amp; disp4n) |
(disp6p &amp; disp4p) | (disp6n &amp; disp4n)) ;
endmodule

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module decode_10b8b

(

input [9:0] datain,

input dispin,

output ko,

output [7:0] dataout,

output dispout,

output code_err,

output disp_err

) ;

wire ai = datain[9] ;

wire bi = datain[8] ;

wire ci = datain[7] ;

wire di = datain[6] ;

wire ei = datain[5] ;

wire ii = datain[4] ;

wire fi = datain[3] ;

wire gi = datain[2] ;

wire hi = datain[1] ;

wire ji = datain[0] ;

wire aeqb = (ai & bi) | (!ai & !bi) ;

wire ceqd = (ci & di) | (!ci & !di) ;

wire p22 = (ai & bi & !ci & !di) |

(ci & di & !ai & !bi) |

( !aeqb & !ceqd) ;

wire p13 = ( !aeqb & !ci & !di) |

( !ceqd & !ai & !bi) ;

wire p31 = ( !aeqb & ci & di) |

( !ceqd & ai & bi) ;

wire p40 = ai & bi & ci & di ;

wire p04 = !ai & !bi & !ci & !di ;

wire disp6a = p31 | (p22 & dispin) ; // pos disp if p22 and was pos, or p31.

wire disp6a2 = p31 & dispin ; // disp is ++ after 4 bits

wire disp6a0 = p13 & ! dispin ; // -- disp after 4 bits

wire disp6b = (((ei & ii & ! disp6a0) | (disp6a & (ei | ii)) | disp6a2 |

(ei & ii & di)) & (ei | ii | di)) ;

// The 5B/6B decoding special cases where ABCDE != abcde

wire p22bceeqi = p22 & bi & ci & (ei == ii) ;

wire p22bncneeqi = p22 & !bi & !ci & (ei == ii) ;

wire p13in = p13 & !ii ;

wire p31i = p31 & ii ;

wire p13dei = p13 & di & ei & ii ;

wire p22aceeqi = p22 & ai & ci & (ei == ii) ;

wire p22ancneeqi = p22 & !ai & !ci & (ei == ii) ;

wire p13en = p13 & !ei ;

wire anbnenin = !ai & !bi & !ei & !ii ;

wire abei = ai & bi & ei & ii ;

wire cdei = ci & di & ei & ii ;

wire cndnenin = !ci & !di & !ei & !ii ;

// non-zero disparity cases:

wire p22enin = p22 & !ei & !ii ;

wire p22ei = p22 & ei & ii ;

//wire p13in = p12 & !ii ;

//wire p31i = p31 & ii ;

wire p31dnenin = p31 & !di & !ei & !ii ;

//wire p13dei = p13 & di & ei & ii ;

wire p31e = p31 & ei ;

wire compa = p22bncneeqi | p31i | p13dei | p22ancneeqi |

p13en | abei | cndnenin ;

wire compb = p22bceeqi | p31i | p13dei | p22aceeqi |

p13en | abei | cndnenin ;

wire compc = p22bceeqi | p31i | p13dei | p22ancneeqi |

p13en | anbnenin | cndnenin ;

wire compd = p22bncneeqi | p31i | p13dei | p22aceeqi |

p13en | abei | cndnenin ;

wire compe = p22bncneeqi | p13in | p13dei | p22ancneeqi |

p13en | anbnenin | cndnenin ;

wire ao = ai ^ compa ;

wire bo = bi ^ compb ;

wire co = ci ^ compc ;

wire do = di ^ compd ;

wire eo = ei ^ compe ;

wire feqg = (fi & gi) | (!fi & !gi) ;

wire heqj = (hi & ji) | (!hi & !ji) ;

wire fghj22 = (fi & gi & !hi & !ji) |

(!fi & !gi & hi & ji) |

( !feqg & !heqj) ;

wire fghjp13 = ( !feqg & !hi & !ji) |

( !heqj & !fi & !gi) ;

wire fghjp31 = ( (!feqg) & hi & ji) |

( !heqj & fi & gi) ;

assign dispout = (fghjp31 | (disp6b & fghj22) | (hi & ji)) & (hi | ji) ;

assign ko = ( (ci & di & ei & ii) | ( !ci & !di & !ei & !ii) |

(p13 & !ei & ii & gi & hi & ji) |

(p31 & ei & !ii & !gi & !hi & !ji)) ;

wire alt7 = (fi & !gi & !hi & // 1000 cases, where disp6b is 1

((dispin & ci & di & !ei & !ii) | ko |

(dispin & !ci & di & !ei & !ii))) |

(!fi & gi & hi & // 0111 cases, where disp6b is 0

(( !dispin & !ci & !di & ei & ii) | ko |

( !dispin & ci & !di & ei & ii))) ;

wire k28 = (ci & di & ei & ii) | ! (ci | di | ei | ii) ;

// k28 with positive disp into fghi - .1, .2, .5, and .6 special cases

wire k28p = ! (ci | di | ei | ii) ;

wire fo = (ji & !fi & (hi | !gi | k28p)) |

(fi & !ji & (!hi | gi | !k28p)) |

(k28p & gi & hi) |

(!k28p & !gi & !hi) ;

wire go = (ji & !fi & (hi | !gi | !k28p)) |

(fi & !ji & (!hi | gi |k28p)) |

(!k28p & gi & hi) |

(k28p & !gi & !hi) ;

wire ho = ((ji ^ hi) & ! ((!fi & gi & !hi & ji & !k28p) | (!fi & gi & hi & !ji & k28p) |

(fi & !gi & !hi & ji & !k28p) | (fi & !gi & hi & !ji & k28p))) |

(!fi & gi & hi & ji) | (fi & !gi & !hi & !ji) ;

wire disp6p = (p31 & (ei | ii)) | (p22 & ei & ii) ;

wire disp6n = (p13 & ! (ei & ii)) | (p22 & !ei & !ii) ;

wire disp4p = fghjp31 ;

wire disp4n = fghjp13 ;

assign code_err = p40 | p04 | (fi & gi & hi & ji) | (!fi & !gi & !hi & !ji) |

(p13 & !ei & !ii) | (p31 & ei & ii) |

(ei & ii & fi & gi & hi) | (!ei & !ii & !fi & !gi & !hi) |

(ei & !ii & gi & hi & ji) | (!ei & ii & !gi & !hi & !ji) |

(!p31 & ei & !ii & !gi & !hi & !ji) |

(!p13 & !ei & ii & gi & hi & ji) |

(((ei & ii & !gi & !hi & !ji) |

(!ei & !ii & gi & hi & ji)) &

! ((ci & di & ei) | (!ci & !di & !ei))) |

(disp6p & disp4p) | (disp6n & disp4n) |

(ai & bi & ci & !ei & !ii & ((!fi & !gi) | fghjp13)) |

(!ai & !bi & !ci & ei & ii & ((fi & gi) | fghjp31)) |

(fi & gi & !hi & !ji & disp6p) |

(!fi & !gi & hi & ji & disp6n) |

(ci & di & ei & ii & !fi & !gi & !hi) |

(!ci & !di & !ei & !ii & fi & gi & hi) ;

assign dataout = {ho, go, fo, eo, do, co, bo, ao} ;

assign disp_err = ((dispin & disp6p) | (disp6n & !dispin) |

(dispin & !disp6n & fi & gi) |

(dispin & ai & bi & ci) |

(dispin & !disp6n & disp4p) |

(!dispin & !disp6p & !fi & !gi) |

(!dispin & !ai & !bi & !ci) |

(!dispin & !disp6p & disp4n) |

(disp6p & disp4p) | (disp6n & disp4n)) ;

endmodule

Verilog 10b/8b decoder

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Verilog 10b/8b decoder

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